Chips, industrial dependence, and the struggle for democratic ownership
Artificial intelligence has a physical foundation: processors, memory, fabrication plants, packaging, networks, electricity, and human labor. Asking who makes “AI chips” is therefore the beginning of a larger question: who controls the material conditions under which society’s accumulated knowledge can be used?
Control over AI is distributed across an unequal industrial chain. Designing processors, fabricating silicon, supplying memory, and renting computing services are distinct activities, often controlled by different firms. Mapping these relationships reveals how socially produced knowledge depends on infrastructure concentrated in relatively few hands.
Scope: this is a selective industry map checked in September 2026, not a market-share ranking or a catalogue of every latest product. Named generations illustrate roles; their inclusion does not imply that they are the newest or universally best. Vendor documents verify product identity and intended use, not independent proof of superiority.
1. The major players occupy different layers
At the accelerator-design layer, NVIDIA and AMD are major GPU suppliers; Intel offers Gaudi accelerators. Google, AWS, Microsoft, and Meta develop custom chips for their infrastructure. Broadcom and Marvell provide custom-silicon and connectivity capabilities. These organizations should not all be described as factories that manufacture their own leading-edge chips. [1] [2] [3] [4] [5] [6] [7] [8] [9]
At the manufacturing layer, TSMC, Samsung Foundry, and Intel Foundry provide fabrication capabilities, with different processes, customer relationships, and levels of deployment. At the memory layer, SK hynix, Samsung, and Micron supply important components. ASML supplies lithography equipment; packaging and testing specialists such as ASE perform another distinct industrial role. [10] [11] [12] [13] [14] [15] [16] [17]
These layers are interdependent. A new accelerator design does not create an independent supply chain if it still depends on the same fabrication, memory, packaging, and software bottlenecks.
2. Accelerator designers and integrated platforms
- NVIDIA: combines GPU architecture with software, networking, and system integration. Blackwell illustrates this relationship. B200 is a GPU; GB200 combines GPUs with a Grace CPU; GB200 NVL72 is a rack-scale system. Calling B200 itself a rack-scale product confuses levels of integration. [1]
- AMD: its Instinct family, including the MI350 series, is an alternative platform for AI and high-performance computing. Software support and actual workload performance matter alongside chip specifications. [2]
- Intel: Gaudi 3 supports both training and inference. Intel’s accelerator products and its foundry services are separate roles. [3] [12]
- Google: TPUs are custom application-specific processors accessible through Google Cloud services. Their usefulness depends on supported models, software, capacity, and deployment arrangements. [4]
- AWS: Trainium and Inferentia belong to an integrated cloud and software ecosystem. Trainium is used for training and serving; Inferentia is oriented toward inference. These are not interchangeable retail GPU products. [5]
- Microsoft: Maia is an in-house accelerator program; Maia 200 is explicitly presented as an inference accelerator. An internal deployment announcement should not be read as a promise of unrestricted customer access to individual chips. [6]
- Meta: MTIA serves its own infrastructure needs. Its 2026 MTIA 300 disclosure describes training for ranking and recommendation models. It is inaccurate to treat the entire family as permanently inference-only or as a general public cloud offering. [7]
- Broadcom and Marvell: custom accelerator design and high-speed connectivity are central to their roles. They illustrate how cloud companies can design distinctive systems while depending on specialized silicon partners. [8] [9]
Competition among these platforms is real, but it does not automatically disperse control. A cloud operator can reduce dependence on an outside GPU supplier while making its own customers more dependent on its service.
3. Specialist architectures, enterprise systems, and on-device AI
Cerebras explores wafer-scale processing. Its WSE-3 announcement specifies 900,000 AI-optimized cores and four trillion transistors, not merely “tens of thousands” of cores. These are product specifications, not a universal performance ranking. [18]
Groq focuses on inference. Its December 2025 announcement describes a non-exclusive technology license with NVIDIA, personnel transfers, and continued independent operation. The relationship should neither be ignored nor inaccurately presented as a completed corporate acquisition. [19]
SambaNova develops reconfigurable dataflow hardware and associated systems and services; Tenstorrent offers AI processors, systems, and licensable IP. Graphcore remains relevant to accelerator history and design, but its acquisition by SoftBank in 2024 means it should not be presented simply as an independent startup. [20] [21] [22]
Huawei’s Ascend processors and Atlas systems are important to a geographically broader account. IBM’s Telum II and Spyre illustrate enterprise-oriented acceleration; IBM identifies Samsung Foundry as their fabrication partner. This is a concrete example of the distinction between a chip’s designer and manufacturer. [23] [24]
On-device and edge computing form another category. Apple’s Neural Engine, Qualcomm NPUs, and NVIDIA Jetson support different local computing environments. Local processing can reduce network dependence and some data transfers, but hardware location alone does not guarantee privacy: application behavior, telemetry, security, and user control still matter. [25] [26] [27]
These examples are not interchangeable alternatives for every task. An accelerator for a phone, a recommendation system, and a large training cluster must be evaluated against different requirements.
4. The factories and enabling industries behind the brands
A foundry fabricates integrated circuits for customers. TSMC explicitly describes its model as manufacturing customers’ products. Samsung combines foundry capabilities with other semiconductor businesses; Intel also offers foundry services. Listing these companies does not mean that their processes or capacity can substitute for one another without redesign and qualification. [10] [11] [12]
High-bandwidth memory is equally consequential. SK hynix, Samsung, and Micron supply memory technologies used in AI systems. The accelerator must be fed with data; adding arithmetic units cannot overcome every memory limitation. Capacity, bandwidth, energy, and integration must be considered together. [13] [14] [15]
Advanced packaging connects processor dies, memory, and other components within a system. Samsung’s HPC/AI materials and ASE’s packaging services illustrate why fabrication is only part of production. A design that can be manufactured on a wafer may still face packaging, testing, cooling, or system-delivery constraints. [11] [17]
ASML supplies EUV lithography systems used in advanced semiconductor manufacturing. It is an equipment supplier, not an AI accelerator brand. This matters because industrial power can reside in the tools required to make competing products. [16]
The broader political inference is that numerous product brands can coexist with concentrated dependencies. A serious analysis follows the chain beyond the logo on the processor.
5. Performance claims: compare useful work, not isolated numbers
Training adjusts model parameters; inference uses a trained model to produce outputs. Both can use reduced or mixed numerical precision when appropriate. The suitable precision depends on the model, hardware, and acceptable trade-offs in accuracy and efficiency.
Memory needs, communication, batch size, model structure, and latency targets all affect performance. In language-model inference, processing an input prompt and generating subsequent tokens can stress a system differently. A single peak compute figure cannot describe the whole service.
TOPS and FLOPS require a stated numerical format and counting convention. Tokens per second requires the model, input and output lengths, concurrency, quality settings, and latency conditions. A vendor’s best-case result on one workload should not become a claim that one architecture always beats another.
MLPerf uses defined scenarios and accuracy and performance requirements to make comparisons more meaningful. Even standardized results must be read with their hardware and software configurations; they do not replace evaluation of a specific production workload. [28]
A procurement decision should consider useful throughput at acceptable quality, response time, total system energy, reliability, software migration, staffing, and exit costs. Comparative research on emerging accelerators reinforces the need to examine particular workloads and configurations rather than infer universal winners from architectural labels. [31]
6. Software can turn technical advantage into durable dependence
A processor is useful only when applications can run on it efficiently. Compilers, libraries, frameworks, communication software, and accumulated engineering expertise are therefore part of the productive infrastructure.
Switching suppliers may require rewriting code, validating numerical behavior, retraining staff, and accepting temporary performance losses. Conversely, a well-supported alternative can create bargaining power and widen access. Neither outcome follows from the chip’s peak performance alone.
The distinction between competition and democratic control is crucial. More suppliers may improve price and choice while leaving workers, public institutions, and communities with little authority over what gets built. Open software can reduce some barriers, but open code does not manufacture chips or allocate electricity.
Chapter 2, Section 2, provides the conceptual connection: socially produced knowledge can coexist with private control of the means needed to apply it. The argument is not that engineering deserves no reward. It is that contributions from science, education, labor, and society cannot justify unlimited power for the owners of a bottleneck. [B]
7. Clouds, sovereign infrastructure, and the power to allocate access
Cloud services can lower the initial cost of access by replacing ownership with rented capacity. They can also place users under a provider’s pricing, quotas, technical interfaces, and service conditions. Access to compute and control over compute are different relationships.
Custom cloud chips can improve efficiency without becoming a public resource. Similarly, infrastructure located within a country is not automatically democratically governed. “Sovereign AI” must be evaluated by who controls it, whose rights it protects, and whether its decisions can be challenged.
Chapter 3 links data and infrastructure to power. Applied here, the question is whether universities, public services, small organizations, and independent researchers can obtain dependable access without surrendering their autonomy. [B]
Export policy also shapes access to computing infrastructure. In 2025, BIS announced the rescission and non-enforcement of the AI Diffusion Rule; this did not abolish all chip export controls. The episode illustrates how state policy can reshape access across an already unequal industrial system. [29]
8. Labor and ecology belong inside the account of innovation
AI hardware embodies the work of researchers, designers, fabrication and assembly workers, software engineers, technicians, and infrastructure staff. This social cooperation is obscured when innovation is attributed only to corporate leadership or a product brand.
The book calls attention to the social production of knowledge and the distinction between productive capacity and human flourishing. Extending that framework to hardware means asking who gains secure livelihoods, whose work becomes more intense, and who participates in investment decisions. [B]
Energy efficiency is necessary but does not establish lower total resource use when deployment expands. The IEA’s 2025 base case projects global data-centre electricity demand of approximately 945 TWh in 2030. This includes all data centres, not AI alone, and remains a projection. [30]
Public evaluation should examine measured system energy, local electricity and water conditions, equipment lifetimes, repairability, and project-specific impacts. Environmental accountability requires transparent evidence about actual facilities and workloads.
9. From rivalry between owners to democratic control of infrastructure
Chapter 1’s “AI: a tool, not destiny” rejects the idea that a technical trajectory determines the social future. Chapter 4, Section 3, asks how productive forces come into conflict with the relations governing their use. Hardware makes that conflict material: society can develop immense capabilities while access remains conditional on concentrated purchasing power. [B]
The book’s Chapter 4, Section 7, makes an essential distinction: «از همین رو، مفهوم مالکیت اجتماعی باید از مالکیت دولتی متمایز شود.»—“For this reason, the concept of social ownership must be distinguished from state ownership” (translated from Persian). [B]
Public procurement or public ownership can contribute to change, but democratic power requires more than a state logo. Workers and users need representation, institutions need independent scrutiny, and people need the freedom to criticize and organize.
A program consistent with the book could include:
- Public and cooperative computing capacity with transparent allocation rules and protected access for education, research, health, and cultural work.
- Conditions on public support that secure public benefits, fair labor standards, accountable governance, and a share in the value created.
- Interoperability, portable software and data, and realistic exit provisions that reduce dependence on a single provider.
- Collective bargaining and participation by workers and affected communities in infrastructure decisions.
- Ecological limits and public assessment of energy, water, land, and equipment lifetimes.
- International scientific cooperation and diversified sourcing, alongside safeguards against surveillance and unaccountable state control.
- Distribution of productivity gains through shorter working hours, secure livelihoods, public services, and democratically governed social wealth funds.
These are proposals developed from the book’s framework, not conclusions established by vendor specifications. Public institutions can be captured and cooperatives can fail; accountability, pluralism, and revision remain necessary.
The revolutionary task is to change who has the power to decide. Society should not be limited to producing knowledge, supplying labor, and paying the infrastructure bill while others monopolize the benefits. The material foundations of AI should expand the capacity of people to learn, create, cooperate, and govern their shared life.
Reading alongside the book
[B] A New Social Order in the Age of Consciousness / نظم اجتماعی نوین در عصر آگاهی, Volume One, free Persian website edition. Access the book. English section titles and quoted passages are translated from Persian. References identify chapters and sections because pagination varies across formats.
- Chapter 1: AI as a tool rather than destiny; freedom as a condition of producing awareness; conscious transition as an open possibility.
- Chapter 2, Section 2: the social production of knowledge and its private ownership.
- Chapter 3, Sections 4 and 6: ownership of data and concentration of technological power.
- Chapter 4, Sections 3, 6, and 7: productive forces and relations of production; reduced working hours and distribution; social ownership and economic justice.
The book’s concepts connect this industrial map to a wider political question: how can socially produced knowledge be governed democratically? Social ownership requires actual governing rights for workers, users, and communities. Public title alone does not establish such control.
Technical vocabulary: accelerator = شتابدهنده; foundry = کارخانهٔ ساخت قراردادی تراشه; fabrication = ساخت تراشه روی ویفر; advanced packaging = بستهبندی پیشرفتهٔ تراشه; inference = استنتاج، یعنی اجرای مدل آموزشدیده; training = آموزش مدل; bandwidth = پهنای باند; throughput = توان عملیاتی; latency = تأخیر; vendor lock-in = وابستگی دشوارگسست به عرضهکننده.
Sources and how to read them
Company publications identify product roles and industrial relationships; their promotional performance claims should be distinguished from independent evidence. Benchmark methodology and external research help assess technical claims. The book supplies the political framework.
[1] NVIDIA: Blackwell architecture, B200, GB200 and NVL72.
[2] AMD: Instinct MI350 series.
[3] Intel: Gaudi 3 accelerator white paper.
[4] Google Cloud: TPU documentation.
[5] AWS: Trainium and Inferentia deployment.
[6] Microsoft: Maia 200 inference accelerator.
[7] Meta: MTIA 300 training accelerator.
[8] Broadcom: AI infrastructure and custom accelerators.
[9] Marvell: custom ASICs.
[10] TSMC: dedicated foundry model.
[11] Samsung Foundry: HPC/AI and advanced packaging.
[12] Intel Foundry: manufacturing services.
[13] SK hynix: memory and HBM product information.
[14] Samsung: high-bandwidth memory.
[15] Micron: AI data-centre memory and storage.
[16] ASML: EUV lithography systems.
[17] ASE: semiconductor assembly, packaging and testing.
[18] Cerebras: WSE-3 announcement.
[19] Groq: non-exclusive NVIDIA licensing agreement.
[20] SambaNova: RDU systems and inference services.
[21] Tenstorrent: processors, systems and IP.
[22] Graphcore: SoftBank ownership disclosure.
[23] Huawei: Ascend and Atlas computing infrastructure.
[24] IBM: Telum II and Spyre, with Samsung fabrication.
[25] Apple: Deploying Transformers on the Apple Neural Engine.
[26] Google Developers: Qualcomm NPU and LiteRT.
[27] NVIDIA: Jetson modules and developer kits.
[28] MLCommons: MLPerf Inference submission requirements.
[29] BIS: AI Diffusion Rule rescission announcement, 2025.
[30] IEA: Energy and AI, executive summary, 2025.
[31] Research: Evaluating Emerging AI/ML Accelerators: IPU, RDU, and NVIDIA/AMD GPUs.
